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个人信息Personal Information
教授
教师英文名称：Shengjin WANG
教师英文名称：Shengjin WANG
教师拼音名称：wangshengjin
教师拼音名称：wangshengjin
电子邮箱：
电子邮箱：
性别：男
性别：男
学位：博士学位
学位：博士学位
毕业院校：东京工业大学
毕业院校：东京工业大学
学科：信号与信息处理
- [31] Yifan Sun, Qin Xu, Yali Li, Chi Zhang, Shengjin Wang*, Jian Sun, Learning Visibility-aware Part-level Features with Self-supervision for Partial Person Re-identification, CVPR2019, Long Beach, CA, USA, June, 2019.
- [32] Zhongdao Wang, Shengjin Wang, Linkage Based Face Clustering via Graph Convolution Network, CVPR2019, Long Beach, CA, USA, June, 2019.
- [33] Yuxuan Zhu, Yali Li, Shengjin Wang, Unsupervised Deep Hashing with Adaptive Feature Learning for Image Retrieval, IEEE Signal Processing Letters, IEEE Signal Processing Letters On page(s): 1—5, 2019. Print ISSN: 1070-9908 Online ISSN: 1558-2361 Digital Object Identifier: 10.1109/LSP.2019.2892233
- [34] Jianqiang Wang, Yali Li, Shengjin Wang, A Highly Accurate Feature Fusion Network For Vehicle Detection In Surveillance Scenarios, BMVC2018, September 3, Newcastle, UK.
- Yiming Chen, Guodong Yin, Mufeng Zhou, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, and Xueqing Li, "SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity-Compensated Fully-Parallel Analog Adder Tree," IEEE TCAS-I.
- Jianfeng Wang, Zhonghao Chen, Yiming Chen, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Sumitha George, Huazhong Yang, and Xueqing Li, "WeightLock: a Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators," AICAS2023.
- Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li, "FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access with Reduced Bitline Charging Activity and Recycled Bitline Charge," IEEE TCAS-I.
- Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, and Xueqing Li, "Victor: A Variation-resilient Approach Using Cell-clustered Charge-domain computing for High-density High-throughput MLC CiM," DAC2023.
- Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, and Xueqing Li, "ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory," DAC2023.
- J. Yue, C. He, Z. Wang, Z. Cong, Y. He, M. Zhou, W. Sun, X. Li, C. Dou, F. Zhang, H. Yang, Y. Liu, M. Liu, "A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse Digital Architecture," ISSCC2023.
- Y. He, H. Diao, C. Tang, W. Jia, X. Tang, Y. Wang, J. Yue, X. Li, H. Yang, H. Jia, Y. Liu, "A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference," ISSCC 2023.
- Yushen Fu, Chengyu Huang, Longqiang Lai, Nan Sun, Xueqing Li*, and Huazhong Yang, "A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC Achieving >70dBc SFDR and <-80dBc IM3 up to 1GHz with Enhanced Constant-Switching-Activity Data-Weighted-Averaging," IEEE TCAS-I.
- Yushen Fu, Chengyu Huang, Limeng Sun, Weiguang Meng, Xueqing Li*, and Huazhong Yang, "A 6.0-GS/s Time-Interleaved DAC Using an Asymmetric Current-Tree Summation Network and Differential Clock Timing Calibration," IEEE TVLSI.
- Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li, "FAST: A Fully-Concurrent Access SRAM Topology for High Row-wise Parallelism Applications Based on Dynamic Shift Operations," IEEE TCAS-II.
- Yi Xiao, Yixin Xu, Zhouhang Jiang, Shan Deng, Zijian Zhao, Antik Mallick, Limeng Sun, Rajiv Joshi, Xueqing Li, Nikhil Shukla, Vijaykrishnan Narayanan, and Kai Ni, "On the Write Schemes and Efficiency of FeFET 1T NOR Array for Embedded Nonvolatile Memory and Beyond," IEDM 2022.